MiniComp Processor:

Addressable registers:
0	a	Accumulator
1	b	Second ALU input
2	c	Temporary storage register
3	ar0	Address register 0

Registers visable to programmer:
a	Accumulator
b	Second ALU input
c	Temporary storage register
ar	16-bit address register. The lowest nybble is the only part that can be directly addressed by the CPU. The other three sections have to be shifted in from ar0 using the PSH instruction.
f	Flags. The only way to access the flags is by using the SWF instruction, which swaps f with a.

Contents of the flag register:
bit
0	c	Carry
1	z	Zero
2	v	Overflow
3	s	Sign

Instruction set and op-codes:
Op	Name	Cycles		Description
0	swf		2			SWap the contents of the Flag register with the contents of the accumulator.
1	cmp		2			CoMPare registers a and b. Subtracts b from a and modifies the flags. No writeback occurs.
2	sub		2			SUBtract b from a and store in a.
3	add		2			ADD a and b and store in a.
4	xor		2			XOR a and b and store in a.
5	or		2			OR a and b and store in a.
6	and		2			AND a and b and store in a.
7	shr		2			SHift the accumulator Right by one bit. Fill the MSB with the carry flag.
8	ldi		3			LoaD Imediate. Load a register (a, b, c, or ar0) with a constant.
9	ld		3			LoaD a register (a, b, c, or ar0) with the contents of the memory location pointed to by the address register.
#a	st		3			STore a register (a, b, c, or ar0) into a memory location pointed to by the address register.
#b	mov		3			MOVe the contents of a register (a, b, c, or ar0) to another register (a, b, c, or ar0).
#c	psh		2			PuSH ar0 down into the address register stack. The other nybbles in the stack are pushed into the next register in line. The last nybble is written to a 25120 memory chip.
#d	inc		2			INCrement the address register.
#e	br.		2			BRanch if the specified flag is in the specified state.
#f	nop		1			No OPeration. Waste an instuction cycle.